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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions of 3.0 V ≤ VDD ≤ 5.5 V, 6.0 V ≤ VPWR ≤ 32 V, -40 ° C ≤ TC ≤ 125 ° C, and calibrated
timers, unless otherwise noted. Where typical values reflect the parameter’s approx. average value with VPWR = 13 V, TA =
25 ° C.
Characteristic
Symbol
Min
Typ
Max
Unit
Notes
10. This parameter is guaranteed by design, however is not production tested.
11. Assuming Ideal external 10:1 Voltage Divider. Tolerance of 10:1 Voltage Divider is not included. Voltage is measured on the High End
of Divider - not at the pin. 10:1 N.3.A 10:1 Voltage Divider is produced using two resistors with a 9:1 resistance ratio by the basic formula:
------------------ = ----------------------
VOUT R1
VIN R1 + R2
Where R2 = 9XR1
CURRENT SENSE COMPARATOR (RSP, RSN) (CONTINUED)
MAXI Trip Threshold Accuracy
7.5
%
Steady State Condition
6.0 A across 0.02 Ω (RSP - RSN = 120 mV)
21 A across 0.04 Ω (RSP - RSN = 840 mV)
MAXI TRIPTA
-7.5
–
MAXI Trip Point During Overlapping Dwell
Input Bias Current
RSP and RSN
MAXI TRIPOD
I BIASRSX
-35
-50
–
–
+35
50
%
μA
Comparator Hysteresis Voltage
NOMI
MAXI
Input Voltage Range (Maximum voltage between RSN and RSP) (12)
NOMI HYS
MAXII HYS
VCMVR CMVR
40
40
0.0
–
–
–
70
70
2.0
% of VT
V
Ground Offset Voltage Range
(12)
VGND OVR
-0.3
–
0.3
V
Maximum offset between RSN pin and IC Ground (Exposed Pad)
GENERAL PURPOSE GATE DRIVER PARAMETERS (GD 0:3)
Gate Drive Sink and Source Current
I GD
1.0
2.0
5
mA
Gate Drive Output Voltage
I GD = 1.0 mA
I GD = -1.0 mA
V GS (ON)
V GS (OFF)
4.8
0.0
7.0
0.2
9.0
0.5
V
V
Short to Battery Fault Detection Voltage Threshold
V DD = 5.0 V, Outputs Programmed ON
Programmable from 0.5 to 3.0 V in 0.5 V increments. ( Table 14 )
Open Fault Detection Voltage Threshold (referenced to IC ground tab)
V DS(FLT-TH)
V DS(FLT-TH)
-35%
+35%
V
V
V DD = 5.0 V, Outputs Programmed OFF
Output OFF Open Load Detection Current
FBx = 18 V, Outputs Programmed OFF
Output Clamp Voltage
Driver Command Off, Clamp Enabled, V GATE = 2.0 V
I FBX(FLT-SNS)
V OC
2.0
50
48
2.5
75
53
3.0
120
58
μ A
V
DIGITAL INTERFACE
Input Logic High-voltage Thresholds
Input Logic Low-voltage Thresholds
Input Logic-voltage Hysteresis
Input Logic Capacitance
V IH
V IL
V HYS
C IN
0.7 x V DD
GND - 0.3
100
–
–
–
–
–
V DD + 0.3
0.2 x V DD
400
20
V
V
mV
pF
Sleep Mode Input Logic Current
I LOGIC_SS
μ A
V DD = 0 V
-10
–
10
33810
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
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